1. Field of the Invention
The present invention relates generally to an output circuit of a charge transfer device and, more particularly, to an output circuit for a charge transfer device including a floating diffusion type charge detecting section.
2. Description of the Prior Art
In conventional CCD (charge coupled device) image sensing devices using this kind of charge transfer device as a horizontal transfer section (horizontal shift register), a coupling occurs when the floating diffusion region is reset so that an output waveform thereof becomes as shown in FIG. 1 of the accompanying drawings. In the output waveform shown in FIG. 1, a level A corresponds to a black level and a level B corresponds to a white level, respectively. An amplitude voltage S corresponds to a signal voltage. A level C is the coupling voltage that is used to reset the floating diffusion region and is not utilized in the signal processing at all.
Recently a demand for making the CCD solid state image sensing device higher in sensitivity is increased more and more. The higher the CCD solid state image sensing device becomes in sensitivity, the larger the coupling voltage becomes. If the sensitivity is increased twice, for example, then the coupling voltage also is increased twice. If the coupling voltage is increased as described above, then a dynamic range of circuits such as a buffer or the like necessary for processing an output signal of the device in the outside is widened, which needs a more expensive buffer.
A charge detecting section of a floating diffusion type includes a source-follower stage composed of a drive MOS (metal oxide semiconductor) transistor Q.sub.1 and a load MOS transistor Q.sub.2 which converts a signal charge supplied to a floating diffusion region FD into a signal voltage as shown in FIG. 2 of the accompanying drawings. In this charge detecting section, in order to increase a conversion efficiency, an area of the gate of the drive MOS transistor Q.sub.1 must be reduced and a capacitance thereof must be reduced. That is, how to reduce the scale of the drive MOS transistor Q.sub.1 becomes important.
If a threshold voltage V.sub.TH and a channel width W of the drive MOS transistor Q.sub.1 are fluctuated due to a dispersion in the manufacturing process, then a fluctuation of a DC bias of an output from the source-follower stage, in particular, is increased. There is then the possibility that a dynamic range of a buffer 6 at the succeeding stage will be widened over a limit. In this case, the CCD solid state image sensing device cannot derive an output normally. As a result, the reduction of the scale of the drive MOS transistor Q.sub.1 cannot be made substantially and there arises a limit on the increase of the conversion efficiency.